WSEAS Transactions on Circuits and Systems
Contents:
2016 | 2015 | 2014 | 2013 | 2012 | 2011 | 2010 | 2009 | 2008 | Pre-2008
Print ISSN: 1109-2734
E-ISSN: 2224-266X
Volume 15, 2016
Notice: As of 2014 and for the forthcoming years, the publication frequency/periodicity of WSEAS Journals is adapted to the 'continuously updated' model. What this means is that instead of being separated into issues, new papers will be added on a continuous basis, allowing a more regular flow and shorter publication times. The papers will appear in reverse order, therefore the most recent one will be on top.
Volume 15, 2016
Title of the Paper: Exponential Step-up/Step-down Type Switched-Capacitor Power Supply with Variable Conversion Ratio
Authors: Tomoya Iwanaga, Shinya Terada, Kei Eguchi, Ichirou Oota
Abstract: In this paper, a switched-capacitor(SC) power supply which can obtain exponential conversion ratios is J(+-K) proposed (J and K are integer). The conversion ratio can be varied between J-K and J+K by shifting the clock phase of each switch. Concerning the general proposed circuit, the ideal step-up ratio is analyzed changing J and K at no-load, and HSPICE simulations are performed under the J=2 and J=3 types. As a result, (1) at no-load, J=3 type can obtain the highest step-up voltage ratio with the same number of elements, (2) under the load, J=2 type can obtain the highest power conversion efficiency with the same chip-size and the same turn-on/turn-off time of each switch. Furthermore, the inrush current can be decreased by changing conversion ratio at start-up.
Keywords: switched-capacitor power supply, exponential step-up/step-down, DC-DC converter, small-sized and lightweight, inrush current
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #19, pp. 165-170
Title of the Paper: Design of Synchronous Section-Carry Based Carry Lookahead Adders with Improved Figure of Merit
Authors: P. Balasubramanian
Abstract: The section-carry based carry lookahead adder (SCBCLA) architecture was proposed as an efficient alternative to the conventional carry lookahead adder (CCLA) architecture for the physical implementation of computer arithmetic. In previous related works, self-timed SCBCLA architectures and synchronous SCBCLA architectures were realized using standard cells and FPGAs. In this work, we deal with improved realizations of synchronous SCBCLA architectures designed in a semi-custom fashion using standard cells. The improvement is quantified in terms of a figure of merit (FOM), where the FOM is defined as the inverse product of power, delay and area. Since power, delay and area of digital designs are desirable to be minimized, the FOM is desirable to be maximized. Starting from an efficient conventional carry lookahead generator, we show how an optimized section-carry based carry lookahead generator is realized. In comparison with our recent work dealing with standard cells based implementation of SCBCLAs to perform 32-bit addition of two binary operands, we show in this work that with improved section-carry based carry lookahead generators, the resulting SCBCLAs exhibit significant improvements in FOM. Compared to the earlier optimized hybrid SCBCLA, the proposed optimized hybrid SCBCLA improves the FOM by 88.3%. Even the optimized hybrid CCLA features improvement in FOM by 77.3% over the earlier optimized hybrid CCLA. However, the proposed optimized hybrid SCBCLA is still the winner and has a better FOM than the currently optimized hybrid CCLA by 15.3%. All the CCLAs and SCBCLAs are implemented to realize 32-bit dual-operand binary addition using a 32/28nm CMOS process.
Keywords: Addition, Ripple carry adder, Carry lookahead adder, ASIC, CMOS, Standard cells
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #18, pp. 155-164
Title of the Paper: Modeling, Simulation and Design of Variable Structure Based Sliding Mode Controller for KY-Voltage Boosting Converter
Authors: S. Sentamil Selvan, K. Ramash Kumar, R. Bensraj
Abstract: The demand of the non-isolated voltage-boosting converters has experienced an unprecedented augmentation in the last decade. The diversified application domains host the variety of specifications and rating on DC/DC converters and several variations has been addressed, in addition to the basic buck and boost converters. The main issue with them is presence of objectionable level of voltage ripple, which is due the current pulsation. KY series of converters offer solution to this issue and they always dwell in continuous conduction mode (CCM) and imitate the synchronous rectification in performance. This paper presents the analysis, design and load voltage control of positive output KY voltage boosting converter (KY-VBC) using variable structure based sliding mode controller (SMC) for purposes needing the fixed power supply in battery operated portable devices, computer peripheral devices, various medical equipments, industrial and robot system applications etc. The SMC is developed for the innately variable-nature of the KY-VBC with help of the state-space average based model. The performance characteristics of the SMC are verified for its robustness to perform over a wide range of operating conditions through MATLAB/Simulink model in comparison with linear proportional-integral (PI) controller. Theoretical analysis and simulation results are presented along with the complete design procedure.
Keywords: DC-DC power conversion, KY-boost converter, sliding mode controller, proportional integral controller, state-space average model
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #17, pp. 143-154
Title of the Paper: Fast and Area-Efficient Hardware Implementation of the K-Means Clustering Algorithm
Authors: Awos Kanan, Fayez Gebali, Atef Ibrahim
Abstract: K-means clustering algorithm aims to partition data elements of an input dataset into K clusters in which each data element belongs to the cluster with the nearest centroid. The algorithm may take long time to process large datasets. In this paper, a fast and area-efficient hardware implementation of the K-means algorithm for clustering one-dimensional data is proposed. In the proposed design, centroids update equations are rewritten to calculate the new centroids recursively. New centroids are calculated using the current centroid value and the change in this value that results from adding or removing one data element to or from the cluster. In the new equations, the division operation appears only in the term that represents this change. The proposed design approximates only the value of this change by replacing the slow and area-consuming division operation with a shift operation. New centroids are also calculated without the need to accumulate the summation of all data elements in each cluster, as in the conventional accumulation-based design of the algorithm. Experimental results show that the approximation adopted in the proposed design results in a more area-efficient hardware implementation without affecting the quality of clustering results. Experimental results also show that the algorithm converges faster using less number of iterations as a result of continuously updating clusters centroids compared to the general update approach used in the conventional design.
Keywords: K-means, Clustering, Data Mining, Hardware, Reconfigurable Computing, FPGA
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #16, pp. 133-142
Title of the Paper: Discontinuous Pulse Width Modulation Algorithm for Single-Phase Grid-Connected Inverter
Authors: Xi-Jun Yang, Frede Blaabjerg, Hao Qu, Hou-Jun Tang
Abstract: Single-phase grid-connected inverter (GCI) is a kind of single-phase voltage source converter (VSC), and as the indispensable tie unit between different power supplies, it is widely used in the fields of wind generation and solar PV generation. In the paper, as first, on the basis of the concept of the discontinuous pulse-width modulation (DPWM) for three-phase VSI, a new DPWM of single-phase GCI is presented by means of zero-sequence component injection. Then, the transformation from stationary frame (abc) to rotating frame (dq) is designed after reconstructing the other orthogonal current by means of one order all-pass filter. Finally, the presented DPWM based single-phase GCI is established, analyzed and simulated by means of MATLAB/SIMULINK. The simulation results show the validation of the above modulation algorithms, and the DPWM based single-phase GCR has reduced power loss and increased efficiency.
Keywords: Voltage source inverter, Grid-connected inverter, Zero-sequence component, Discontinuous pulse width modulation, abc-dq coordinate transformation, Slide mode control
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #15, pp. 123-132
Title of the Paper: A Fault Tolerance Improved Majority Voter for TMR System Architectures
Authors: P. Balasubramanian, K. Prasad, N. E. Mastorakis
Abstract: For digital system designs, triple modular redundancy (TMR), which is a 3-tuple version of N-modular redundancy is widely preferred for many mission-control and safety-critical applications. The TMR scheme involves two-times duplication of the simplex system hardware, with a majority voter ensuring correctness provided at least two out of three copies of the system remain operational. Thus the majority voter plays a pivotal role in ensuring the correct operation of the system. The fundamental assumption implicit in the TMR scheme is that the majority voter does not become faulty, which may not hold well for implementations based on latest technology nodes with dimensions of the order of just tens of nanometers. To overcome the drawbacks of the classical majority voter some new voter designs were put forward in the literature with the aim of enhancing the fault tolerance. However, these voter designs generally ensure the correct system operation in the presence of either a faulty function module or the faulty voter, considered only in isolation. Since multiple faults may no longer be excluded in the nanoelectronics regime, simultaneous fault occurrences on both the function module and the voter should be considered, and the fault tolerance of the voters have to be analyzed under such a scenario. In this context, this article proposes a new fault-tolerant majority voter which is found to be more robust to faults than the existing voters in the presence of faults occurring internally and/or externally to the voter. Moreover, the proposed voter features less power dissipation, delay, and area metrics based on the simulation results obtained by using a 32/28nm CMOS process.
Keywords: Digital design, Fault modelling, Fault tolerance, TMR, Majority voter, CMOS, Standard cells
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #14, pp. 108-122
Title of the Paper: Data Acquisition and Control of a New Electromagnetic Force-Displacement Sensor Using National Instruments ‘‘LabVIEW’’ Software
Authors: Zakarya Abbassi, Amine Benabdellah, Abdelrhani Nakheli
Abstract: A new electromagnetic force-displacement sensor is presented. Its operating principle is based on the fundamental laws of electromagnetism (Faraday-Lenz law) and the mechanical properties of a spring. The active elements are two coils made by a wire of 60 μm in diameter. The sensor signal is acquired using a high precision DAQ card, processed and stored on the computer using a LabVIEW Program. The average accuracy of the sensor is about Δd=1μm, and as a force sensor is about ΔF = 1μN. This sensor could be successfully used for the manufacture of several measuring instruments.
Keywords: Electromagnetic force-displacement sensor, accuracy, measuring instruments, DAQ, LabVIEW
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #13, pp. 102-107
Title of the Paper: An Asynchronous Early Output Full Adder and a Relative-Timed Ripple Carry Adder
Authors: P. Balasubramanian, N. E. Mastorakis
Abstract: This article presents the design of a new asynchronous early output full adder which when cascaded leads to a relative-timed ripple carry adder (RCA). The relative-timed RCA requires imposing a very small relative-timing assumption to overcome the problem of gate orphans associated with internal carry propagation. The relative-timing assumption is however independent of the RCA size. The primary benefits of the relativetimed RCA are processing of valid data incurs data-dependent forward latency, while the processing of spacer involves a very fast constant time reverse latency of just 1 full adder delay which represents the ultimate in the design of an asynchronous RCA with the fastest reset. The secondary benefits of the relative-timed RCA are it achieves good optimization of power and area metrics simultaneously. A 32-bit relative-timed RCA constructed using the proposed early output full adder achieves respective reductions in forward latency by 67%, 10% and 3.5% compared to the optimized strong-indication, weak-indication, and early output 32-bit asynchronous RCAs existing in the literature. Based on a similar comparison, the proposed 32-bit relative-timed RCA achieves corresponding reductions in cycle time by 83%, 12.7% and 6.4%. In terms of area, the proposed 32-bit relative-timed RCA occupies 27% less Silicon than its optimized strong-indication counterpart and 17% less Silicon than its optimized weak-indication counterpart, and features increased area occupancy by a meager 1% compared to the optimized early output 32-bit asynchronous RCA. The average power dissipation of all the asynchronous 32-bit RCAs are found to be comparable since they all satisfy the monotonic cover constraint. The simulation results obtained correspond to a 32/28nm CMOS process.
Keywords: Asynchronous design, Relative-timing, Indication, Ripple Carry Adder, CMOS, Standard cells
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #12, pp. 91-101
Title of the Paper: On-Site Portable Partial Discharge Detection Applied to Power Cables Using HFCT and UHF Methods
Authors: Guang Chen, Jiagui Tao, Yong Ma, Hui Fu, Yang Liu, Zhicheng Zhou, Chengjun Huang, Canxin Guo
Abstract: Partial discharge (PD) events happen inside the power cables and cable terminations with the insulation degradation. The PD detection can effectively supply the information of cable status. According to the electrical and electromagnetic emission of PD activities, high-frequency transformer (HFCT) and ultra-high-frequency (UHF) methods are employed to detect the PD signals. Besides, a portable PD monitoring device is developed for on-site PD testing. The device consists of signal conditioning, high-speed data acquisition system and data processing unit. The comparison between HFCT and UHF results discriminates the real PD signals from interference remarkably, and contributes to PD source location. Additionally, advanced phase-resolved PD analysis is used to recognize the defect pattern. The on-site experiments show that the combination of HFCT and UHF methods is successful and abstractive in the power cables condition diagnosis.
Keywords: Partial discharge, HFCT, UHF, Potable PD monitoring device, High-speed data acquisition, Interference discrimination, Pattern recognition
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #11, pp. 83-90
Guang Chen, Jiagui Tao, Yong Ma, Hui Fu, Yang Liu, Zhicheng Zhou, Chengjun Huang, Canxin Guo. (2016) On-Site Portable Partial Discharge Detection Applied to Power Cables Using HFCT and UHF Methods. WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS, 15, 83-90
Title of the Paper: Research on Three-Level Rectifier Neutral-Point Voltage Balance Control in Traction Power Supply System of High Speed Train
Authors: Lu Xiao-Juan, Wang Xin-Ju, Guo Qi, Li Shu-Yuan
Abstract: For the neutral-point(NP) voltage balance problem of three-level PWM rectifier in high speed train traction power supply system, in this paper, a method for controlling the neutral point voltage of three level rectifier is proposed, which is based on the method of carrier amplitude conversion. By analyzing the effect of the change of the carrier amplitude on the neutral point potential, the sinusoidal pulse width modulation (SPWM) mode of the carrier amplitude transform is introduced into the control of the single phase three level pulse rectifier. The control of the neutral point voltage is achieved by the modulation of triangle carrier amplitude. Pulse conversion and carrier frequency shift are used in the control of high speed train traction and regenerative braking. At last, the Algorithm was applied to the traction condition and regenerative braking condition control of CRH2 (CHINA RAILWAY HIGH-SPEED). Compared to the transient direct current method that used in high speed train now, adding the pulse conversion and carrier amplitude shift control to the NP voltage control system have better ability to balance the NP voltage under the traction condition and regenerative braking condition. But in the condition of transform traction condition to regenerative braking condition, control method with amplitude shift is proved to be better, which illustrated the validity and superiority of carrier amplitude shift control.
Keywords: High-speed Train, Three-level Rectifier, NP Voltage Balance, Carrier Amplitude Shift
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #10, pp. 73-82
Lu Xiao-Juan, Wang Xin-Ju, Guo Qi, Li Shu-Yuan. (2016) Research on Three-Level Rectifier Neutral-Point Voltage Balance Control in Traction Power Supply System of High Speed Train. WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS, 15, 73-82
Title of the Paper: Small Fault Diagnosis of Front-End Speed Controlled Wind Generator Based on Deep Learning
Authors: Hai-Ying Dong, Li-Xia Yang, Hong-Wei Li
Abstract: In view of the difficulty in diagnosing the early small faults of front-end controlled wind generator (FSCWG), this paper proposes a small fault diagnosis methods based on deep learning. The method adopts a deep learning method, uses vibration data under several different small fault patterns of FSCWG as input of the model and gets deep learning diagnosis model by learning complicated implicit layer structure and training. Then using the trained network to extract feature of FSCWG from original vibration data by layer-wise, and fully excavate the associations among the data and form a more abstract executive property categories or characteristics, to improve the diagnosis accuracy. The results show that compared with the traditional fault diagnosis method of neural network (NN) and support vector machine (SVM) method, the small fault diagnosis method based on deep learning enhances the small fault diagnosis accuracy in the process of generator operation.
Keywords: front-end speed controlled wind generator, small fault, deep learning, convolutional neural network
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #9, pp. 64-72
Hai-Ying Dong, Li-Xia Yang, Hong-Wei Li. (2016) Small Fault Diagnosis of Front-End Speed Controlled Wind Generator Based on Deep Learning. WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS, 15, 64-72
Title of the Paper: A Hybrid Constrained Optimization Approach Coupling PSO and Adaptive Constraint-Handling Technique
Authors: Wen Long, Shaohong Cai, Jianjun Jiao, Wenzhuan Zhang
Abstract: In this paper, we present a novel hybrid approach combining particle swarm optimization (PSO) and adaptive constraint-handling technique (ACT) for solving constrained numerical and engineering optimization problems. The proposed hybrid approach simultaneously adopts particle swarm optimizer and hybrid mutation operators to generate the offspring population. Additionally, the adaptive constraint-handling technique includes three main situations. In each situation, a constraint-handling mechanism is designed based on current population state. Our algorithm is validated using 15 well-known constrained numerical and engineering optimization problems reported in the literature. The experimental results demonstrate that the proposed method shows better performance in comparison to the state-of-the-art algorithms.
Keywords: Constrained optimization problem, Particle swarm optimization, Adaptive constraint-handling technique, Engineering optimization, mutation
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #8, pp. 55-63
Wen Long, Shaohong Cai, Jianjun Jiao, Wenzhuan Zhang. (2016) A Hybrid Constrained Optimization Approach Coupling PSO and Adaptive Constraint-Handling Technique. WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS, 15, 55-63
Title of the Paper: Scalability of V2V and V2I Communications in the Context of Sustainable Mobility
Authors: Evgenia Adamopoulou, Konstantinos Demestichas, Pavlos Kosmides, Vasileios Asthenopoulos, Ioannis Loumiotis
Abstract: Fuel economy and environmental sustainability are currently under the spotlight of research in the area of Intelligent Transport Systems. The project CARMA introduces the novel concept of sharing and distribution of the “travelling experience” acquired by the vehicles, rendering them capable of learning over time to predict (and thus avoid) energy-consuming routes. Special focus is given on V2V and V2I interfaces and interactions, as a means of sharing this travelling experience and creating a large database of travelled routes. V2V interactions will allow a direct (decentralized) distribution of information, while V2I interactions will enable the central platform to have a global view of travelling experiences (historical data) as well as context information (near real-time data). This paper identifies the main types of data and corresponding communication flows, and focuses on the scalability issues of the information exchange for different types of wireless access networks.
Keywords: vehicle-to-vehicle, vehicle-to-infrastructure, mobile communication technologies, wireless networks, 802.11p
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #7, pp. 48-54
Evgenia Adamopoulou, Konstantinos Demestichas, Pavlos Kosmides, Vasileios Asthenopoulos, Ioannis Loumiotis. (2016) Scalability of V2V and V2I Communications in the Context of Sustainable Mobility. WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS, 15, 48-54
Title of the Paper: Ripple Current Analysis of Three-Level Inverter Based on SVPWM and Design of LCL Filter
Authors: Yongchao Chen, Shifeng Chen, Zhengli Li
Abstract: Three-level gird-connected converter is used more and more widely in renewable energy generation system. At the same time LCL filter is also widely utilized in order to achieve lower current harmonic. However, current research about LCL filter is mostly aimed at two-level inverter. The study involving multi-level inverter is much less. When using space vector pulse width modulation, Current transient process near the current peak value of three-level inverter in one switching period is analyzed. And the lower limit of arm side inductance is obtained through the study of maximum ripple current. After that, based on LCL filter model for high order harmonic, the impact on ripple inhibition and resonant frequency caused by different filter parameters and scale factor is analyzed, Which provides a basis for design of LCL output filter parameters. Finally, calculations are made. Both the simulation and experiment results verify the validity of the proposed Design method.
Keywords: three-level inverter, SVPWM, LCL filter, harmonic, ripple
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #6, pp. 41-47
Yongchao Chen, Shifeng Chen, Zhengli Li. (2016) Ripple Current Analysis of Three-Level Inverter Based on SVPWM and Design of LCL Filter. WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS, 15, 41-47
Title of the Paper: Research on SVM Strategy for Matrix Converter and its Simulation
Authors: Yongchao Chen, Zhenwei Liu, Yuwei Zou, Yanda Li
Abstract: This paper presents double space vector modulation (SVM) strategy for three-phase to three-phase matrix converter and discusses the modeling method based on Matlab/ Simulink in detail. The process of switches conversion is analyzed and a novel modulation mode is proposed. Simulation waveforms are presented which demonstrate the feasibility and validity of the proposed modulation mode. The method discussed in this paper lays strong basis for its further researches and approaching to applications and it can be directly implemented to practical matrix converter system.
Keywords: matrix converter, modulation, SVM, modeling, simulation
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #5, pp. 35-40
Yongchao Chen, Zhenwei Liu, Yuwei Zou, Yanda Li. (2016) Research on SVM Strategy for Matrix Converter and its Simulation. WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS, 15, 35-40
Title of the Paper: A Novel Design and Implementation of Electronic Weather Station and Weather Data Transmission System Using GSM Network
Authors: S. H. Parvez, J. K. Saha, M. J. Hossain, H. Hussain, Md. M. A. Ghuri, T. A. Chowdhury, Md. M. Rahman, N. Z. Shuchi, A. Islam, M. Hasan, B. Paul
Abstract: The purpose of this project is to design and implement a cost effective, portable weather station to measure and display different weather parameters. Conventional weather stations are larger in size and incur a huge cost of installment, which is a limiting factor for developing countries. Although low cost miniature systems are also available but they are of poor precision. The goal of the project is to introduce an economical system that ensures flexibility, portability, scalability and user friendly operations. The design incorporates sensors and equipments to assess temperature, humidity, atmospheric pressure, wind speed, precipitation, presence of rain, UV index, dust density, ambient light intensity and presence of different gas in the atmosphere. To measure wind speed and precipitation, conducive mechanical structures are designed which can be made from locally available materials. The system utilizes solar energy which makes it a stand-alone system. Measured data through the developed system can be uploaded to the web server and sent to the user through web page or through text messages.
Keywords: Weather station, Microcontroller, Anemometer, GSM, Hall Effect sensor, MPL115A1, UV, TEMT6000, Dust density
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #4, pp. 21-34
S. H. Parvez, J. K. Saha, M. J. Hossain, H. Hussain, Md. M. A. Ghuri, T. A. Chowdhury, Md. M. Rahman, N. Z. Shuchi, A. Islam, M. Hasan, B. Paul. (2016) A Novel Design and Implementation of Electronic Weather Station and Weather Data Transmission System Using GSM Network. WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS, 15, 21-34
Title of the Paper: A Novel Approach for Analog Circuit Incipient Fault Diagnosis by Using Kernel Entropy Component Analysis as a Preprocessor
Authors: Chao-Long Zhang, Yi-Gang He, Li-Fen Yuan, Wei He
Abstract: In order to diagnose incipient fault of analog circuits effectively, an analog circuit incipient fault approach by using kernel entropy component analysis (KECA) as a preprocessor is proposed in the paper. Time responses are acquired by sampling outputs of the circuits under test. Raw features with high dimension are generated by wavelet transform. Furthermore, lower dimensional features are produced through KECA as samples which are used to construct a classification model based on least squares support vector machine. Bandpass filter and leapfrog filter incipient fault diagnosis simulations demonstrate the diagnose procedure of the proposed approach, and also validate proposed approach by using KECA as a preprocessor can produce higher diagnosis accuracy than the commonly used methods.
Keywords: Analog circuits, Incipient fault diagnosis, Wavelet transform, KECA, Least squares support vector machine
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #3, pp. 13-20
Chao-Long Zhang, Yi-Gang He, Li-Fen Yuan, Wei He. (2016) A Novel Approach for Analog Circuit Incipient Fault Diagnosis by Using Kernel Entropy Component Analysis as a Preprocessor. WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS, 15, 13-20
Title of the Paper: Charge Pump for Negative High Voltage Generation with Variable Voltage Gain
Authors: Jun Zhao, Yong-Bin Kim, Kyung Ki Kim
Abstract: In this paper, a new cross-coupled charge pump for negative high voltage generation has been proposed. The problem of shoot-through current in the conventional cross-coupled charge pump is solved by a four clock phase scheme. By switching the power supply to each stage based on the supply voltage, a variable voltage gain is obtained. A complete analysis of the interaction between the power efficiency, area, and frequency are presented. The proposed cross-coupled charge pump has been designed to deliver 40 A with a wide supply range from 2.5V to 5.5V using 0.18 m high voltage LDMOS technology. In order to have a fixed output voltage within -15 3V, the voltage gain of the charge pump circuit is variable from -3X to -7X and is based on the supply voltage.
Keywords: Charge pump, dc-dc converter, switched-capacitor power converter, voltage multiplier
WSEAS Transactions on Circuits and Systems, ISSN / E-ISSN: 1109-2734 / 2224-266X, Volume 15, 2016, Art. #2, pp. 9-12
Jun Zhao, Yong-Bin Kim, Kyung Ki Kim. (2016) Charge Pump for Negative High Voltage Generation with Variable Voltage Gain. WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS, 15, 9-12